NXP Semiconductors MPC5566 - Page 316

System Integration Unit (SIU)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 6-113
The following table describes the DSPI input select fields:
Table 6-152. SIU_DISR Field Descriptions
Bits Name Description
0–1 SINSELA
[0:1]
DSPI A data input select. Specifies the source of the DSPI A data input.
00 SINA_PCSC[2]_GPIO[94] pin
01 SOUTB
10 SOUTC
11 SOUTD
2–3 SSSELA
[0:1]
DSPI A slave select input select. Specifies the source of the DSPI A slave select
input.
00 PCSA[0]_GPIO[96] pin
01 PCSB[0] (master)
10 PCSC[0] (master)
11 PCSD[0] (master)
4–5 SCKSELA
[0:1]
DSPI A clock input select. Specifies the source of the DSPI A clock input.
00 SCKA_PCSC[1]_GPIO[93] pin
01 SCKB (master)
10 SCKC (master)
11 SCKD (master)
6–7 TRIGSELA
[0:1]
DSPI A trigger input select. Specifies the source of the DSPI A trigger input.
00 No Trigger
01 PCSB[4]
10 PCSC[4]
11 PCSD[4]
8–9 SINSELB
[0:1]
DSPI B data input select. Specifies the source of DSPI B data input.
00 SINB_PCSC[2]_GPIO[103] pin
01 SOUTA
10 SOUTC
11 SOUTD
10–11 SSSELB
[0:1]
DSPI B slave select input select. Specifies the source of the DSPI B slave select
input.
00 PCSB[0]_PCSD[2]_GPIO[105] pin
01 PCSA[0] (master)
10 PCSC[0] (master)
11 PCSD[0] (master)
12–13 SCKSELB
[0:1]
DSPI B clock input select. Specifies the source of the DSPI B clock input.
00 SCKB_PCSC[1]_GPIO[102] pin
01 SCKA (master)
10 SCKC (master)
11 SCKD (master)
14–15 TRIGSELB
[0:1]
DSPI B trigger input select. Specifies the source of the DSPI B trigger input for
master or slave mode.
00 Invalid value
01 PCSA[4]
10 PCSC[4]
11 PCSD[4]