NXP Semiconductors MPC5566 - Page 528

External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-41
Figure 12-23. Burst 32-bit Read Cycle, Zero Wait States
Figure 12-24. Burst 32-bit Read Cycle, One Initial Wait State
CLKOUT
ADDR[8:31]
BDIP
DATA[0:31]
TA
RD_WR
TSIZ[0:1]
TS
OE
CS[n]
Expects more data
ADDR[29:31] = ‘000’
‘00’
DATA is valid
Wait state
CLKOUT
ADDR[8:31]
BDIP
DATA[0:31]
TA
RD_WR
TSIZ[0:1]
TS
OE
CS[n]
Expects more data
ADDR[29:31] = ‘000’
DATA is valid
‘00’