External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-65
Figure 12-42. External Master Write to MCU
If the external master is another MCU with this EBI, then BB and other control pins are turned off
*
If the external master is another MCU with this EBI, then DATA remains valid as shown due to use
of latched TA internally. These extra data valid cycles (past TA) are not required by the slave EBI.
**
as shown due to use of latched TA internally. This extra cycle is not required by the slave EBI.
Receive bus grant and bus busy
negated for second cycle
Assert BB drive address
and assert TS
Using the internal arbiter
CLKOUT
BR
(input)
RD_WR
TSIZ[0:1]
BDIP
BG
BB
ADDR[8:31]
DATA[0:31]
TS
(input)
Minimum
two wait states
DATA is valid
TA
(output)
*
DATA is valid
**
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