NXP Semiconductors MPC5566 - Page 617

Fast Ethernet Controller (FEC)
MPC5566 Microcontroller Reference Manual, Rev. 2
15-8 Freescale Semiconductor
0x0280 RMON_R_DROP Count of frames not counted correctly
0x0284 RMON_R_PACKETS RMON RX packet count
0x0288 RMON_R_BC_PKT RMON RX broadcast packets
0x028C RMON_R_MC_PKT RMON RX multicast packets
0x0290 RMON_R_CRC_ALIGN RMON RX packets with CRC/align error
0x0294 RMON_R_UNDERSIZE RMON RX packets < 64 bytes, valid CRC
0x0298 RMON_R_OVERSIZE RMON RX packets > MAX_FL bytes, valid CRC
0x029C RMON_R_FRAG RMON RX packets < 64 bytes, invalid CRC
0x02A0 RMON_R_JAB RMON RX packets > MAX_FL bytes, invalid CRC
0x02A4 — Reserved
0x02A8 RMON_R_P64 RMON RX 64 byte packets
0x02AC RMON_R_P65TO127 RMON RX 65 to 127 byte packets
0x02B0 RMON_R_P128TO255 RMON RX 128 to 255 byte packets
0x02B4 RMON_R_P256TO511 RMON RX 256 to 511 byte packets
0x02B8 RMON_R_P512TO1023 RMON RX 512 to 1023 byte packets
0x02BC RMON_R_P1024TO2047 RMON RX 1024 to 2047 byte packets
0x02C0 RMON_R_P_GTE2048 RMON RX packets with more than 2048 bytes
0x02C4 RMON_R_OCTETS RMON RX octets
0x02C8 IEEE_R_DROP Count of frames not counted correctly
0x02CC IEEE_R_FRAME_OK Frames received OK
0x02D0 IEEE_R_CRC Frames received with CRC error
0x02D4 IEEE_R_ALIGN Frames received with alignment error
0x02D8 IEEE_R_MACERR Receive FIFO overflow count
0x02DC IEEE_R_FDXFC Flow control pause frames received
0x02E0 IEEE_R_OCTETS_OK Octet count for frames received without error
1
All accesses to and from the FEC memory map must be 32-bit accesses. There is no support for
accesses other than 32-bit.
Table 15-2. MIB Counter Memory Map Locations (continued)
Base Address +
Offset
1
Mnemonic Description