Fast Ethernet Controller (FEC)
MPC5566 Microcontroller Reference Manual, Rev. 2
15-50 Freescale Semiconductor
NOTE
Once the software driver has set up the buffers for a frame, it must set up the
corresponding BDs. The last step in setting up the BDs for a transmit frame
must be to set the R bit in the first BD for the frame. The driver must follow
that with a write to TDAR which triggers the FEC to poll the next BD in the
ring.
Offset + 2 Bits [0:15] Data Length Data length, written by the application.
Data length is the number of octets the FEC must transmit from
this BD’s data buffer. It is never modified by the FEC. Bits [0:10]
are used by the DMA engine, bits[11:15] are ignored.
Offset + 4 Bits [0:15] A[0:15] Tx data buffer pointer, bits [0:15]
1
Offset + 6 Bits [0:15] A[16:31] Tx data buffer pointer, bits [16:31].
1
The transmit buffer pointer, which contains the address of the associated data buffer, must always be evenly
divisible by 4. The buffer must reside in memory external to the FEC. This value is never modified by the
Ethernet controller.
Table 15-37. Transmit Buffer Descriptor Field Definitions (continued)
Halfword Location Field Name Description
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