Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-18 Freescale Semiconductor
Address: EQADC_BASE + 0x0050 (EQADC_CFCR0)
EQADC_BASE + 0x0052 (EQADC_CFCR1)
EQADC_BASE + 0x0054 (EQADC_CFCR2)
EQADC_BASE + 0x0056 (EQADC_CFCR3)
EQADC_BASE + 0x0058 (EQADC_CFCR4);
EQADC_BASE + 0x005A (EQADC_CFCR5)
Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R000000 0 0
MODEn
0000
W SSEn CFINVn
Reset000000 0 000000000
Figure 19-7. eQADC CFIFO Control Registers (EQADC_CFCRn)
Table 19-9. EQADC_CFCRn Field Descriptions
Field Description
0–4 Reserved.
5
SSEn
CFIFO single-scan enable bit n. Used to set the SSSn bit, as described in Section 19.3.2.8, “eQADC FIFO and
Interrupt Status Registers 0–5 (EQADC_FISRn).” Writing a 1 to SSEn sets the SSSn if the CFIFO is in single-scan
mode. When SSSn is already asserted, writing a 1 to SSEn has no effect. If the CFIFO is in continuous-scan mode
or is disabled, writing a 1 to SSEn does not set SSSn. Writing a 0 to SSEn has no effect. SSEn always is read as 0.
0 No effect.
1 Set the SSSn bit.
6
CFINVn
CFIFO invalidate bit n. Causes the eQADC to invalidate all entries of CFIFOn. Writing a 1 to CFINVn resets the value
of CFCTRn in the EQADC_FISR register (refer to Section 19.3.2.8, “eQADC FIFO and Interrupt Status Registers
0–5 (EQADC_FISRn).” Writing a 1 to CFINVn also resets the push next data pointer, transfer next data pointer to the
first entry of CFIFOn in Figure 19-35. Reading CFINVn always returns a 0. Writing a 0 has no effect.
0 No effect.
1 Invalidate all of the entries in the corresponding CFIFO.
Note: Writing CFINVn only invalidates commands stored in CFIFOn; previously transferred commands that are
waiting for execution (commands stored in the ADC command buffers) are executed, and the results are stored
in the RFIFO.
Note: Do not write to CFINVn unless MODEn is disabled, and CFIFO status is IDLE.
7 Reserved.
8–11
MODEn
[0:3]
CFIFO operation mode n. Selects the CFIFO operation mode for CFIFOn. Refer to Section 19.4.3.5, “CFIFO Scan
Trigger Modes,” for more information on CFIFO trigger mode.
Note: If MODEn is not disabled, it must not be changed to any other mode besides disabled. If MODEn is disabled
and the CFIFO status is IDLE, MODEn can be changed to any other mode.
12–15 Reserved.
Table 19-10. CFIFO Operation Mode Table
MODEn[0:3] CFIFO Operation Mode
0b0000 Disabled
0b0001 Software trigger, single scan
0b0010 Low level gated external trigger, single scan
0b0011 High level gated external trigger, single scan
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