NXP Semiconductors MPC5566 - Page 86

Signal Description
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 2-5
BOOTCFG[1]_
IRQ
[3]_
GPIO[212]
Boot configuration input
External interrupt request
GPIO
P
A
G
I
I
I/O
V
DDEH6
SH
BOOTCFG
/ Down
– / Down Y24 AB24
WKPCFG_
GPIO[213]
Weak pull configuration input
GPIO
P
G
I
I/O
V
DDEH6
SH
WKPCFG
/ Up
– / Up Y23 AA24
External Bus Interface (EBI)
8
CS[0]_
ADDR[8]_
9, 10
GPIO[0]
External chip selects
External address bus
GPIO
P
A
G
O
I/O
I/O
V
DDE2
F – / Up – / Up
11
P4 T7
CS
[1:3]_
ADDR[9:11]_
9, 10
GPIO[1:3]
External chip selects
External address bus
GPIO
P
A
G
O
I/O
I/O
V
DDE2
F – / Up – / Up
11
P3, P2, P1 R5, P5, R7
ADDR[8:11]_
9, 10
GPIO[4:7]
External address bus
GPIO
P
G
I/O
I/O
V
DDE2
F – / Up – / Up
11
V4, W3,
W4, Y3
Y5, Y3, AA3,
AB3
ADDR[12:26]_
10
GPIO[8:22]
External address bus
GPIO
P
G
I/O
I/O
V
DDE2
F – / Up – / Up
11
AA4, AA3,
AB4, AB3,
U1, V2,
V1, W2,
W1, Y2,
Y1, AA2,
AA1, AB2,
AC1
Y7, AC3,
AC5, AB5,
T3, T2, T1,
V2, W1, W2,
Y1, Y2, AA2,
AB2, AC2
ADDR[27:29]_
10
GPIO[23:25]
External address bus
GPIO
P
G
I/O
I/O
V
DDE2
F – / Up – / Up
11
AC2, AD1,
AE1
AD2:3, AD1
ADDR[30:31]_
10
ADDR[6:7]_
12
GPIO[26:27]
External address bus
External address bus
GPIO
P
A
G
I/O
I/O
I/O
V
DDE2
F – / Up – / Up
11
AD2, AC3 AF2, AE2
DATA[0:15]_
10
GPIO[28:43]
External address bus
GPIO
P
G
I/O
I/O
V
DDE3
F – / Up – / Up
11
AE8, AF9,
AE9,
AF10,
AE10,
AF12,
AE11,
AF13,
AC11,
AD11,
AC12,
AD12,
AC14,
AD13,
AC15,
AD14
AG11, AF12,
AG13, AH13,
AG14, AH15,
AG15, AH16,
AB12, AF10,
AD13, AF11,
AB15, AD12,
AD15, AF13
DATA[16]_
10
FEC_TX_CLK_
GPIO[44]
External data bus
Ethernet transmit clock
GPIO
P
A
G
I/O
I
I/O
V
DDE3
F – / Up – / Up
11
AF3 AF5
DATA[17]_
10
FEC_CRS_
GPIO[45]
External data bus
Ethernet carrier sense
GPIO
P
A
G
I/O
I
I/O
V
DDE3
F – / Up – / Up
11
AE4 AG5
Table 2-1. MPC5566 Signal Properties (continued)
Signal Names Signal Functions
1
P/
A/
G
I/O
Type Voltage
2
Pad
Type
3
Status
416
Package
496
Vertical
Assembly
4
During
Reset
5
After
Reset
6