NXP Semiconductors MPC5566 - Page 876

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-73
Figure 19-39. State Machine of CFIFO Status
Table 19-45. Command FIFO Status Switching Condition
No.
From Current
CFIFO Status
(CFS)
To New CFIFO
Status (CFS)
Status Switching Condition
1 IDLE
(00)
IDLE
(0b00)
• CFIFO mode is programmed to disabled, OR
• CFIFO mode is programmed to single-scan edge or level
trigger mode and SSS is negated.
2WAITING FOR
TRIGGER
(0b10)
• CFIFO mode is programmed to continuous-scan edge or
level trigger mode, OR
• CFIFO mode is programmed to single-scan edge or level
trigger mode and SSS is asserted, OR
• CFIFO mode is programmed to single-scan software trigger
mode.
3 TRIGGERED
(0b11)
• CFIFO mode is programmed to continuous-scan software
trigger mode
4 WAITING FOR
TRIGGER
(10)
IDLE
(0b00)
• CFIFO mode is modified to disabled mode.
5WAITING FOR
TRIGGER
(0b10)
• No trigger occurred.
6 TRIGGERED
(0b11)
• Appropriate edge or level trigger occurred, OR
• CFIFO mode is programmed to single-scan software trigger
mode and SSS bit is asserted.
8
6
WAITING-
FOR
IDLE
1
2
4
95
7
3
TRIGGER
TRIGGERED
(CFS=0b00)
(CFS=0b10)
(CFS=0b11)