Enhanced Serial Communication Interface (eSCI)
MPC5566 Microcontroller Reference Manual, Rev. 2
21-34 Freescale Semiconductor
Receiver OR Indicates that an overrun condition has occurred. The overrun (OR)
interrupt is set when software fails to read the eSCI data register
before the receive shift register receives the next frame. The newly
acquired data in the shift register is lost in this case, but the data
already in the eSCI data registers is not affected.The OR bit is cleared
by writing a one to the OR bit location in the ESCIx_SR.
ESCIx_SR[4] ORIE
Receiver NF Detect noise error on receiver input. The NF interrupt is set when the
eSCI detects noise on the receiver input.
ESCIx_SR[5] NFIE
Receiver FE Framing error has occurred. The interrupt is set when the stop bit is
read as a 0; which violates the SCI protocol. FE is cleared by writing
it with 1.
ESCIx_SR[6] FEIE
Receiver PF Parity of received data does not match parity bit; parity error has
occurred. The interrupt is set when the parity of the received data is
not correct. PF is cleared by writing it with 1.
ESCIx_SR[7] PFIE
LIN BERR Detected a bit error, only valid in LIN mode. While the eSCI is in LIN
mode, the bit error (BERR) flag is set when one or more bits in the last
transmitted byte is not read back with the same value. The BERR flag
is cleared by writing a 1 to the bit. A bit error causes the LIN FSM to
reset. Clear the BERR flag by writing a 1 to the bit.
ESCIx_SR[11] IEBERR
LIN RXRDY Indicates LIN hardware has received a data byte. While in LIN mode,
the receiver ready (RXRDY) flag is set when the eSCI receives a valid
data byte in an RX frame. RXRDY is not set for bytes which the
receiver obtains by reading back the data which the LIN finite state
machine (FSM) has sent out. Clear the RXRDY flag by writing a 1 to
the bit.
ESCIx_SR[16] RXIE
LIN TXRDY Indicates LIN hardware can accept a control or data byte. While in LIN
mode, the transmitter ready (TXRDY) flag is set when the eSCI can
accept a control or data byte. Clear the TXRDY flag by writing a 1 to
the bit.
ESCIx_SR[17] TXIE
LIN LWAKE A wake-up character has been received from a LIN frame. The LIN
wake-up (LWAKE) flag is set when the LIN hardware receives a
wake-up character sent by one of the LIN slaves. This occurs only
when the LIN bus is in sleep mode. Clear the LWAKE flag by writing a
1 to the bit.
ESCIx_SR[18] WUIE
LIN STO The response of the slave has been too slow (slave timeout). The
slave timeout (STO) flag is set during an RX frame when the LIN slave
has not transmitted all requested data bytes before the specified
timeout period. Clear the STO flag by writing a 1 to the bit.
ESCIx_SR[19] STIE
LIN PBERR Physical bus error detected. If the RXD input remains at the same
value for 15 cycles after a transmission has started, the LIN hardware
sets the physical bus error (PBERR) flag. Clear the PBERR flag by
writing a 1 to the bit.
ESCIx_SR[20] PBIE
LIN CERR CRC error detected. If an RX frame has the CRC checking flag set,
and the two CRC bytes do not match the calculated CRC pattern, the
CRC error (CERR) flag is set. Clear the CERR flag by writing a 1 to
the bit.
ESCIx_SR[21] CIE
Table 21-21. eSCI Interrupt Flags, Sources, Mask Bits, and Descriptions (continued)
Interrupt
Source
Flag Description Source
Local
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