Crossbar Switch (XBAR)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 7-7
Addess: Base + 0x0010 (XBAR_SGPCR0)
Base + 0x0110 (XBAR_SGPCR1)
Base + 0x0310 (XBAR_SGPCR3)
Base + 0x0610 (XBAR_SGPCR6)
Base + 0x0710 (XBAR_SGPCR7)
Access: R/W
0123456789101112131415
R
RO
1
000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000
ARB
00
PCTL
0
PAR K
W
Reset0000000000000000
1
After this bit is set, only a hardware reset clears it.
Figure 7-3. Slave General-Purpose Control Registers (XBAR_SGPCRn)
Table 7-5. XBAR_SGPCRn Field Descriptions
Field Description
0
RO
Read only. Used to force all of a slave port’s registers to be read only. After written to 1, it can only be cleared by
hardware reset.
0 All this slave port’s registers can be written.
1 All this slave port’s registers are read only and cannot be written (attempted writes have no effect and result
in an error response).
1–21 Reserved, must be cleared.
22–23
ARB
Arbitration mode. Used to select the arbitration policy for the slave port. This field is initialized by hardware reset.
00 Fixed priority using MPR
01 Round-robin priority
10 Invalid value
11 Invalid value
24–25 Reserved, must be cleared.
26–27
PCTL
Parking control. Used to select the parking algorithm used by the slave port. This field is initialized by hardware
reset.
00 When no master is making a request, the arbiter parks the slave port on the master port defined by the PARK
control field.
01 POL—Park on last. When no master is making a request, the arbiter parks the slave port on the last master
to own the slave port.
10 LPP—Low-power park. When no master is making a request, the arbiter parks the slave port on no master
and drives all slave port outputs to a safe state.
11 Invalid value
To Next Page
Loading...
