Error Correction Status Module (ECSM)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 8-17
To prevent generating an ECSM interrupt in response to a non-correctable error:
• Enable non-correctable reporting in the ECSM.
• Ensure the external interrupt is disabled.
• Ensure that the INTC_PSR[PRI] value for the ECC error interrupt request is 0.
To use the detailed data or instruction storage exception information, design an exception handler that can
determine:
• The destination that asserted the error, indicated by the value of the ESR[XTE] bit.
• The address of the corrupted instruction for an instruction storage exception (SRR0).
• The address where the error occurred for a data storage exception, indicated in the data exception
address register (DEAR).
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