NXP Semiconductors MPC5566 - Page 368

Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 9-7
Base + 0x10C0 TCD06 eDMA transfer control descriptor 06 256
Base + 0x10E0 TCD07 eDMA transfer control descriptor 07 256
Base + 0x1100 TCD08 eDMA transfer control descriptor 08 256
Base + 0x1120 TCD09 eDMA transfer control descriptor 09 256
Base + 0x1140 TCD10 eDMA transfer control descriptor 10 256
Base + 0x1160 TCD11 eDMA transfer control descriptor 11 256
Base + 0x1180 TCD12 eDMA transfer control descriptor 12 256
Base + 0x11A0 TCD13 eDMA transfer control descriptor 13 256
Base + 0x11C0 TCD14 eDMA transfer control descriptor 14 256
Base + 0x11E0 TCD15 eDMA transfer control descriptor 15 256
Base + 0x1200 TCD16 eDMA transfer control descriptor 16 256
Base + 0x1220 TCD17 eDMA transfer control descriptor 17 256
Base + 0x1240 TCD18 eDMA transfer control descriptor 18 256
Base + 0x1260 TCD19 eDMA transfer control descriptor 19 256
Base + 0x1280 TCD20 eDMA transfer control descriptor 20 256
Base + 0x12A0 TCD21 eDMA transfer control descriptor 21 256
Base + 0x12C0 TCD22 eDMA transfer control descriptor 22 256
Base + 0x12E0 TCD23 eDMA transfer control descriptor 23 256
Base + 0x1300 TCD24 eDMA transfer control descriptor 24 256
Base + 0x1320 TCD25 eDMA transfer control descriptor 25 256
Base + 0x1340 TCD26 eDMA transfer control descriptor 26 256
Base + 0x1360 TCD27 eDMA transfer control descriptor 27 256
Base + 0x1380 TCD28 eDMA transfer control descriptor 28 256
Base + 0x13A0 TCD29 eDMA transfer control descriptor 29 256
Base + 0x13C0 TCD30 eDMA transfer control descriptor 30 256
Base + 0x13E0 TCD31 eDMA transfer control descriptor 31 256
Base + 0x1400 TCD32 eDMA transfer control descriptor 32 256
Base + 0x1420 TCD33 eDMA transfer control descriptor 33 256
Base + 0x1440 TCD34 eDMA transfer control descriptor 34 256
Base + 0x1460 TCD35 eDMA transfer control descriptor 35 256
Base + 0x1480 TCD36 eDMA transfer control descriptor 36 256
Base + 0x14A0 TCD37 eDMA transfer control descriptor 37 256
Base + 0x14C0 TCD38 eDMA transfer control descriptor 38 256
Table 9-1. eDMA 32-bit Memory Map (continued)
Address Register Name Register Description Bits