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NXP Semiconductors MPC5566 - Page 405

NXP Semiconductors MPC5566
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Enhanced Direct Memory Access (eDMA)
MPC5566 Microcontroller Reference Manual, Rev. 2
9-44 Freescale Semiconductor
eSCIB_COMBRX 35 ESCIB.SR[RDRF] ||
ESCIB.SR[RXRDY]
eSCIB combined DMA request of the Receive Data
Register Full and LIN Receive Data Ready DMA
requests
eMIOS_GFR_F6 36 EMIOS.GFR[F6] eMIOS channel 6 Flag
eMIOS_GFR_F7 37 EMIOS.GFR[F7] eMIOS channel 7 Flag
eMIOS_GFR_F10 38 EMIOS.GFR[F10] eMIOS channel 10 Flag
eMIOS_GFR_F11 39 EMIOS.GFR[F11] eMIOS channel 11 Flag
eMIOS_GFR_F16 40 EMIOS.GFR[F16] eMIOS channel 16 Flag
eMIOS_GFR_F17 41 EMIOS.GFR[F17] eMIOS channel 17 Flag
eMIOS_GFR_F18 42 EMIOS.GFR[F18] eMIOS channel 18 Flag
eMIOS_GFR_F19 43 EMIOS.GFR[F19] eMIOS channel 19 Flag
eTPU_CDTRSR_A_DTRS12 44 ETPU.CDTRSR_A[DTRS12] eTPUA Channel 12 Data Transfer Request Status
eTPU_CDTRSR_A_DTRS13 45 ETPU.CDTRSR_A[DTRS13] eTPUA Channel 13 Data Transfer Request Status
eTPU_CDTRSR_A_DTRS28 46 ETPU.CDTRSR_A[DTRS28] eTPUA Channel 28 Data Transfer Request Status
eTPU_CDTRSR_A_DTRS29 47 ETPU.CDTRSR_A[DTRS29] eTPUA Channel 29 Data Transfer Request Status
SIU_EISR_EIF0 48 SIU.SIU_EISR[EIF0] SIU External Interrupt Flag 0
SIU_EISR_EIF1 49 SIU.SIU_EISR[EIF1] SIU External Interrupt Flag 1
SIU_EISR_EIF2 50 SIU.SIU_EISR[EIF2] SIU External Interrupt Flag 2
SIU_EISR_EIF3 51 SIU.SIU_EISR[EIF3] SIU External Interrupt Flag 3
eTPU_CDTRSR_B_DTRS0 52 ETPU.CDTRSR_B[DTRS0] eTPUB Channel 0 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS1 53 ETPU.CDTRSR_B[DTRS1] eTPUB Channel 1 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS2 54 ETPU.CDTRSR_B[DTRS2] eTPUB Channel 2 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS3 55 ETPU.CDTRSR_B[DTRS3] eTPUB Channel 3 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS12 56 ETPU.CDTRSR_B[DTRS12] eTPUB Channel 12 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS13 57 ETPU.CDTRSR_B[DTRS13] eTPUB Channel 13 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS14 58 ETPU.CDTRSR_B[DTRS14] eTPUB Channel 14 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS15 59 ETPU.CDTRSR_B[DTRS15] eTPUB Channel 15 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS28 60 ETPU.CDTRSR_B[DTRS28] eTPUB Channel 28 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS29 61 ETPU.CDTRSR_B[DTRS29] eTPUB Channel 29 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS30 62 ETPU.CDTRSR_B[DTRS30] eTPUB Channel 30 Data Transfer Request Status
eTPU_CDTRSR_B_DTRS31 63 ETPU.CDTRSR_B[DTRS31] eTPUB Channel 31 Data Transfer Request Status
Table 9-23. DMA Request Summary for eDMA (continued)
DMA Request Channel Source Description

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