NXP Semiconductors MPC5566 - Page 487

Frequency Modulated Phase Locked Loop and System Clocks (FMPLL)
MPC5566 Microcontroller Reference Manual, Rev. 2
11-32 Freescale Semiconductor
Figure 11-12. FM Auto-Calibration Flow Chart
Count M reference clock cycles.
CALX = value in feedback counter
Allow system 3 x 384 reference
counts to settle
CAL[N] = 1
Enable FM where N = 7
Count M reference clock cycles.
Store value of feedback
Counter in CAL[0]
Enter calibration mode;
Set PCALPASS = 1
Let DIFF = CALX - CAL0
DIFF > 0
?
Ye s
Let ERR = DIFF - EXP
ERR > 0
?
No
A
CAL[N] = 0
Ye s
PCALPASS = 0
No
A
N = 0
?
No
Ye s
N = N
- 1
CALDONE = 1
DONE
For MFD = 0 to 2: M = 960
For MFD = 3 to 5: M = 640
For MFD = 6 to 8: M = 480
For MFD = 9 to 14: M = 320
For MFD = 15 to 20: M = 240
For MFD = 21 to 31: M = 160