External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-30 Freescale Semiconductor
Figure 12-10. Single-Beat 32-bit Read Cycle, CS Access, Zero Wait States
Figure 12-11. Single-Beat 32-bit Read Cycle, CS
Access, One Wait State
DATA is valid
CLKOUT
ADDR[8:31]
TS
DATA[0:31]
TA
RD_WR
TSIZ[0:1]
BDIP
OE
CS[n]
00
Wait state
00
DATA is valid
CLKOUT
ADDR[8:31]
TS
DATA[0:31]
TA
RD_WR
TSIZ[0:1]
BDIP
OE
CSn