NXP Semiconductors MPC5566 - Page 573

Flash Memory
MPC5566 Microcontroller Reference Manual, Rev. 2
13-8 Freescale Semiconductor
Table 13-5 shows the register set for the flash module.
Array base + 0x00FF_FC00 Shadow block space
S
472 KB
All
1
Array base + 0x00FF_FDD8
Flash shadow row, serial
passcode
8 KB
Array base + 0x00FF_FDE0 Flash shadow row, control word 4 KB
Array base + 0x00FF_FDE4 General use 4 KB
Array base + 0x00FF_FDE8
Flash shadow row,
FLASH_LMLR
reset configuration
4 KB
Array base + 0x00FF_FDEC General use 4 KB
Array base + 0x00FF_FDF0
Flash shadow row,
FLASH_HLR
reset configuration
4 KB
Array base + 0x00FF_FDF4 For general use 4 KB
Array base + 0x00FF_FDF8
Flash Shadow Row,
FLASH_SLMLR
reset configuration
4 KB
Array base +
(0x00FF_FDFC–0x00FF_FFFF)
For general use
516 KB
1
The shadow row does not support RWW. Refer to Section 13.4.2.5, “Flash Shadow Block.”
Table 13-5. Module Register Memory Map
Byte Address Register Name Register Description Bits
Register base + 0x0000 FLASH_MCR Module configuration register 32
Register base + 0x0004 FLASH_LMLR Low and middle address space block locking register 32
Register base + 0x0008 FLASH_HLR High address space block locking register 32
Register base + 0x000C FLASH_SLMLR Secondary low/mid address space block locking register 32
Register base + 0x0010 FLASH_LMSR Low and middle address space block select register 32
Register base + 0x0014 FLASH_HSR High address space block select register 32
Register base + 0x0018 FLASH_AR Address register 32
Register base + 0x001C FLASH_BIUCR Flash bus interface unit control register 32
Register base + 0x0020 FLASH_BIUAPR Flash bus interface unit access protection register 32
Register base +
(0x0030–0x7FFF)
— Reserved —
Table 13-4. Flash Partitions (continued)
Address Use Block Size Partition