Enhanced Modular Input/Output Subsystem (eMIOS)
MPC5566 Microcontroller Reference Manual, Rev. 2
17-60 Freescale Semiconductor
17.4.4.4.16 Output Pulse-Width and Frequency Modulation Buffered Mode (OPWFMB)
The following table lists the output pulse-width and frequency modulation buffered mode settings:
This mode generates waveforms with variable duty cycle and frequency. The internal channel counter is
automatically selected as the time base, A1 sets the duty cycle and B1 determines the frequency. Both A1
and B1 are double buffered to allow smooth signal generation when changing the register values
asynchronously. Both 0% and 100% duty cycles are supported.
To provide smooth and consistent channel operation, this mode differs substantially from the OPWFM
mode. The main differences are in how A1 and B1 are updated, the delay from the A1 match to the output
flip-flop transition, and the range of the internal counter which ranges from 1 up to B1 value.
When a match on comparator A occurs, the output register is set to the value of EDPOL. When a match
on comparator B occurs, the output register is set to the complement of EDPOL. A B1 match also causes
the internal counter to transition to 1, thus re-starting the counter cycle.
Figure 17-44 shows an example of OPWFMB mode operation. The output flip-flop transition occurs when
the A1 or B1 match signal is negated, as detected by the negative edge of the A1 and B1 match signals.
For example, if register A1 is set to 0x000004, the output flip-flop transitions 4 counter periods after the
cycle starts, plus one system clock cycle. In the example shown in Figure 17-44 the prescaler ratio is set
to two (refer to Section 17.5.3, “Time Base Generation).
Table 17-29. OPWFMB Operating Modes
MODE[0:6] Unified Channel OPWFM Operating Mode
0b1011000 Output pulse-width and frequency modulation, buffered. FLAG set at match of
internal counter and comparator B.
0b1011001 Reserved
0b1011010 Output pulse-width and frequency modulation, buffered. FLAG set at match of
internal counter and comparator A or comparator B.
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