Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-21
8–11 Reserved.
12
RFOIEn
RFIFO overflow interrupt enable n. Enables the eQADC to generate an interrupt request when the corresponding 
RFOFn in EQADC_FISRn is asserted. Refer to Section 19.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5 
(EQADC_FISRn).”
Apart from generating an independent interrupt request for an RFIFOn overflow event, the eQADC also provides a 
combined interrupt at which the result FIFO overflow Interrupt, the command FIFO underflow interrupt, and the 
command FIFO trigger overrun interrupt requests of all CFIFOs are ORed. When RFOIEn, CFUIEn, and TORIEn 
are all asserted, this combined interrupt request is asserted whenever one of the following 18 flags becomes 
asserted: RFOFn, CFUFn, and TORFn (assuming that all interrupts are enabled). Refer to Section 19.4.7, “eQADC 
eDMA/Interrupt Request,” for details.
0 Disable overflow interrupt request
1 Enable overflow Interrupt request
13 Reserved.
14
RFDEn
RFIFO drain enable n. Enables the eQADC to generate an interrupt request (RFDSn is asserted) or eDMA request 
(RFDSn is negated) when RFDFn in EQADC_FISRn (Refer to Section 19.3.2.8, “eQADC FIFO and Interrupt Status 
Registers 0–5 (EQADC_FISRn)”) is asserted.
0 Disable RFIFO drain eDMA or interrupt request
1 Enable RFIFO drain eDMA or interrupt request
Note: RFDEn must not be negated while an eDMA transaction is in progress.
15
RFDSn
RFIFO drain select n. Selects if an eDMA or interrupt request is generated when RFDFn in EQADC_FISRn (Refer 
to Section 19.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn)
”) is asserted. If RFDEn is 
asserted, the eQADC generates an interrupt request when RFDSn is negated, or it generates an eDMA request 
when RFDSn is asserted.
0 Generate interrupt request to move data from RFIFn to the system memory
1 Generate eDMA request to move data from RFIFOn to the system memory
Note: RFDSn must not be negated while an eDMA transaction is in progress.
Table 19-11. EQADC_IDCRn Field Descriptions (continued)
Field Description