NXP Semiconductors MPC5566 - Page 832

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-29
The third eQADC CFIFO status snapshot register is displayed in Figure 19-13.
Address: Base + 0x00A8 Access: RO
0 123456789101112131415
R CFS0_TSSI CFS1_TSSI CFS2_TSSI CFS3_TSSI CFS4_TSSI CFS5_TSSI 0 0 0 0
W
Reset0 000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R ENI LCFTSSI TC_LCFTSSI
W
Reset0 111100000000000
Figure 19-13. eQADC CFIFO Status Snapshot Register 2 (EQADC_CFSSR2)
Table 19-16. EQADC_CFSSR2 Field Descriptions
Field Description
0–11
CFSn_TSSI
[0:1]
CFIFO Status at Transfer through the eQADC SSI. Indicates the CFIFOn status at the time a serial transmission
through the eQADC SSI is initiated. CFSn_TSSI is a copy of the corresponding CFSn in EQADC_CFSR (see
Section 19.3.2.11, “eQADC CFIFO Status Register (EQADC_CFSR)”) captured at the time a serial transmission
through the eQADC SSI is initiated.
12–15 Reserved.
16
ENI
External command buffer number Indicator. Indicates to which external command buffer the last command was
transmitted.
0 Last command was transferred to command buffer 2.
1 Last command was transferred to command buffer 3.