Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 19-51
Read Configuration Command Message Format for On-Chip ADC Operation
Figure 19-28 describes the command message format for a read configuration command when interfacing
with the on-chip ADCs. A read configuration command is used to read the contents of the on-chip ADC
registers which are only accessible via command messages. Read configuration commands are
differentiated from write configuration commands by an asserted R/W bit.
2–4 Reserved.
5
EB
External buffer bit. Always clear this bit for messages sent to an on-chip ADC.
0 Command is sent to an internal command buffer.
1 Command is sent to an external command buffer.
6
BN
Buffer number. Indicates to which buffer the message is sent.Buffers 1 and 0 can either be internal or external
depending on the EBI bit setting.
0 Message buffer 0.
1 Message buffer 1.
7
R/W
Read/write. A negated R/W indicates a write configuration command.
0Write
1 Read
8–15
ADC_
REGISTER
_HIGH_
BYTE[0:7]
ADC register high byte. The value to be written into the most significant 8 bits of control/configuration register
when the R/W bit is negated.
16–23
ADC_
REGISTER
_LOW_
BYTE[0:7]
ADC register low byte. The value to be written into the least significant 8 bits of a control/configuration register
when the R/W bit is negated.
24–31
ADC_REG_
ADDRESS
[0:7]
ADC register address. Identifies to which ADC register the read or write is performed. Only use 16-bit (halfword)
addresses. Refer to Table 19-25. Refer to Table 19-25.
0 1 23456789101112131415
EOQ PAUSE Reserved
EB
(0b0)
BN
R/W
(0b1)
MESSAGE_TAG Reserved
CFIFO Header ADC Command
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Reserved ADC_REG_ADDRESS
ADC Address
Figure 19-28. Read Configuration Command Message Format for On-Chip ADC Operation
Table 19-35. On-Chip ADC Field Descriptions: Write Configuration
Field Description
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