NXP Semiconductors MPC5566 - Page 907

Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5566 Microcontroller Reference Manual, Rev. 2
19-104 Freescale Semiconductor
Figure 19-57. Synchronous Serial Interface Protocol Timing
NOTE:
t
MDT
= Minimum t
DT
is programmable and defined in
Section 18.3.2.12, ‘eQADC SSI Control Register (EQADC_SSICR).’
FCK
SDS
Master Sample
Input
SDO
1
End
Transmission
t
DT
Slave Sample
Input
2 3 ... 23 24 25 26 1 2 3 ... 23 24 25
msb msb
26
1 2 3 ... 23 24 25 26 1 2 3 ... 23 24 25
msb msb
261
msb
Begin
Transmission
End
Transmission
Begin
Transmission
SDI