EasyManua.ls Logo

NXP Semiconductors MPC5566 - Page 541

NXP Semiconductors MPC5566
1268 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
External Bus Interface (EBI)
MPC5566 Microcontroller Reference Manual, Rev. 2
12-54 Freescale Semiconductor
Table 12-22 shows a description of the states defined for the internal arbiter protocol.
Table 12-23 shows the truth table for the internal arbiter protocol.
Table 12-22. Internal Arbiter State Descriptions
State Description Outputs
MCU owner idle MCU controls the bus, but is not currently running a transaction BG
=1, BB=hiZ
External owner External master controls the bus; can be running a transaction or not BG
=0, BB=hiZ
MCU bus wait MCU controls the bus for the next transaction
Waiting for the external master to negate BB
for the current transaction in progress
BG =1, BB=hiZ
MCU owner busy MCU controls the bus
Currently running a transaction
BG
=1, BB=0 or 1
External bus wait External master controls the bus for next transaction
Waiting for MCU to negate BB for the current transaction in progress
BG
=0, BB=0 or 1
Table 12-23. Truth Table for Internal Arbiter
State
Outputs Previous Inputs External Status
Next State
BG
BB
1
BR
2
BB
3
MCU
internal
request
pending
(IRP)
4
External
has
higher
priority
(EHP)
5
MCU
external
transaction
in progress
(or starting
next cycle)
(ETP)
6
Recent
BG
(RBG)
7
MCU owner idle 1 hiZ 1 X 0 0 0 X
8
MCU owner idle
MCU owner idle 1 hiZ X X 0 1 0 X
9
External owner
MCU owner idle 1 hiZ 0 X 0 X 0 X External owner
MCU owner idle 1 hiZ 0 X X 1 0 X External owner
MCU owner idle 1 hiZ X X 1 0 X X MCU owner busy
MCU owner idle 1 hiZ 1 X 1 X X X MCU owner busy
MCU owner idle 1 hiZ X X X X 1 X MCU owner busy
External owner 0 hiZ X X 0 X X
10
X
11
External owner
External owner 0 hiZ 0 X X 1 X X External owner
External owner 0 hiZ X X 1 0 X X MCU bus wait
External owner 0 hiZ 1 X 1 X X X MCU bus wait
MCU bus wait 1 hiZ X 0 X
12
XX
10
X MCU bus wait
MCU bus wait 1 hiZ X X X X X 1 MCU bus wait
MCU bus wait 1 hiZ X 1 X X X 0 MCU owner busy
MCU owner busy 1 0 or 1
13
1X X X 1 X
8
MCU owner busy
MCU owner busy 1 0 or 1 1 X 1 X X X MCU owner busy
MCU owner busy 1 0 or 1 X X 1 0 X X MCU owner busy
MCU owner busy 1 0 or 1 0 X X 1 1 X External bus wait

Table of Contents

Related product manuals