Rohde & Schwarz RTE - SPI Bus (Option R&S RTE-K1); The SPI Protocol

Protocol analysis
R&S
®
RTE
539User Manual 1326.1032.02 ─ 20
For an introduction to search results, see:
●
Chapter 11.1.2, "Search results", on page 446
●
Chapter 11.4, "Result presentation", on page 463
The remote commands for the search reults are described in Chapter 18.17.3.5, "I²C
search results", on page 1451.
13.3 SPI bus (option R&S RTE-K1)
● The SPI protocol................................................................................................... 539
● SPI configuration...................................................................................................540
● SPI trigger............................................................................................................. 543
● SPI decode results................................................................................................546
● Search on decoded SPI data................................................................................ 549
13.3.1 The SPI protocol
A 4-channel instrument is required for full support of the SPI protocol, or the MSO
option R&S RTE-B1.
The Serial Peripheral Interface SPI is used for communication with slow peripheral
devices, in particular, for transmission of data streams.
Main characteristics of SPI are:
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Master-slave communication
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No device addressing; The slave is accessed by a chip select, or slave select line.
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No acknowledgement mechanism to confirm receipt of data
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Duplex capability
Most SPI buses have four lines, two data and two control lines:
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Clock line to all slaves (SCLK)
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Slave Select or Chip Select line (SS or CS)
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Master data output, slave data input (MOSI or SDI)
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Master data input, slave data output (MISO or SDO)
When the master generates a clock and selects a slave device, data may be transfer-
red in either or both directions simultaneously.
Figure 13-6: Simple configuration of SPI bus
SPI bus (option R&S RTE-K1)