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Infineon Technologies TC1796 - 2.2.3 Execution Unit

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-5 V2.0, 2007-07
CPU, V2.0
2.2.3 Execution Unit
The Execution Unit contains the Integer Pipeline, the Load/Store Pipeline and the Loop
Pipeline.
The Integer Pipeline and Load/Store Pipeline have four stages: Fetch, Decode, Execute,
and Write-back. The Execute stage may extend beyond one cycle to accommodate
multi-cycle operations such as load instructions.
The Loop Pipeline has two stages: Decode and Write-back.
All three pipelines operate in parallel, permitting up to three instructions to be executed
in one clock cycle.
Figure 2-4 Execution Unit
MCA05588
Loop Exec.
To Register File
EA
Address ALU
ALU
Bit Processor
MAC
Load/Store
Decode
IP Decode
Integer Pipeline Loop PipelineLoad/Store Pipeline
Decode
Execute
Loop
Decode
IP Decode = Instruction Prefetch and Decode
MAC = Multiply-Accumulate Unit
ALU = Arithmetic/Logic Unit
Loop Exec. = Loop Execution Unit
EA = Effective Address

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