TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual 11-7 V2.0, 2007-07
PCP, V2.0
R7 is the only one of the eight registers that may not be used as a full GPR. The most
significant 16 bits of R7 may not be written, and will always read back as 0. However, no
error will occur when writing to the most significant 16 bits.
Note: The GPRs of the PCP are not memory-mapped into the overall address space.
They can only be directly accessed through PCP instructions. The contents of all
or some of the registers are part of a channel program’s context stored in the
PRAM between executions of the channel program. This context is then
accessible from outside the PCP.
11.3.1.1 Register R0
R0 is used as an implicit operand destination for some instructions. These are detailed
in the individual instruction descriptions.
11.3.1.2 Registers R1, R2, and R3
R1, R2, and R3 are general-use registers. It is recommended that, by convention, R2
should be used as a return address register when call and return program structures are
used.
11.3.1.3 Registers R4 and R5
Registers R4 and R5 are also general-use registers. However, the COPY instruction
implicitly uses R4 and R5 as full 32-bit address pointers (R4 is used as the source
address and R5 as the destination address). As the COPY instruction uses these
registers to maintain the address pointers, either or both R4 and R5 values may or may
not be modified by the COPY instruction, depending on the options used in the
instruction.
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