TC1796
System Units (Vol. 1 of 2)
CPU Subsystem
User’s Manual 2-31 V2.0, 2007-07
CPU, V2.0
2.6 Data Memory Interface (DMI)
Figure 2-13 DMI Block Diagrams
2.6.1 DMI Features
The Data Memory Interface (DMI) has the following features:
• 64 Kbyte data memory:
– 8 Kbyte Dual-Port data memory (DPRAM), accessible from CPU and Remote
Peripheral Bus
– 56 Kbyte local data memory (LDRAM)
– DPRAM and LDRAM are parity protected
• CPU interface:
– Supporting unaligned accesses (16-bit aligned) with a minimum penalty of one
cycle for unaligned accesses crossing 2 lines
• Data Local Memory Bus (DLMB) interface. Allows access to the rest of the system.
8 KB
DPRAM
CPU
Interface
DMI
Control
Registers
MCB05597
To/From Data
Local Memory Bus
128
Data Switch
&
Data Alignment
&
Interface Control
64
DLMB Interface
Slave Master
128
56 KB
LDRAM
BPI
Interface
To/From
Remote
Peripher
Interface
Bus
(RPB)
Data Memory
Interface (DMI)
DMEM
DMEM = Data Memory in DMI
LDRAM = Local Data RAM
DPRAM = Dual-Port RAM
DLMB = Data Local Memory Bus
128
128
32 32
Parity
Control/Check
To SCU (DMI Memory
Parity Errors)
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