EasyManuals Logo

Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
2150 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #814 background imageLoading...
Page #814 background image
TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-36 V2.0, 2007-07
EBU, V2.0
The next cycle (Cycle n + 3) sees these parameters being passed to the appropriate
external access cycle state machine (used to select/initialize the appropriate external
access cycle, and also to select the external bus pins to be used for the access cycle).
Write Protection
Each address region has an associated bit to provide write protection (programmable
separately for each region). Write protection is controlled by the WRITE bit in the
EBU_BUSCONx and EBU_EMUBC registers.
Writing to the area occupied by a write-protected region will only generate an error if
there is not a lower-priority region programmed for write accesses at the matching
address (i.e. if the access causes no regions to be selected).
13.5.5 Little-/Big-Endian Access Modes
The native mode of the EBU is little-endian (in line with the architecture of TriCore).
Additionally, the EBU provides limited support for big-endian access modes. Big-endian
accesses are supported by modifying the least significant two address bits. This feature
is programmable separately for each chip select region by bits ENDIAN in registers
EBU_BUSCONx and EBU_EMUBC.
Big-endian access mode is available only for single accesses (8-bit, 16-bit, or 32-bit) to
regions programmed for 16-bit wide operation. There is no support for burst accesses to
regions that have been programmed for big-endian operation. There is no concept of
little- and big-endian for accesses to 32-bit wide external regions.
Table 13-13 shows how the lower two bits of the PLMB address are changed before
being issued as an address on the external bus.
Table 13-13 Little- and Big-endian Address Translation
Internal
(PLMB)
Address
External Address
Little-Endian Big-Endian
16-bit Access 8-bit Access 16-bit Access 8-bit Access
…XXX00
B
…XXX00
B
…XXX00
B
…XXX10
B
…XXX11
B
…XXX01
B
1)
1) This is a non-aligned 16-bit access that can never be generated on the PLMB.
…XXX01
B
1)
…XXX10
B
…XXX10
B
…XXX10
B
…XXX00
B
…XXX01
B
…XXX11
B
1)
…XXX11
B
1)
…XXX00
B

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Infineon Technologies TC1796 and is the answer not in the manual?

Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish