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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Micro Link Interface (MLI)
User’s Manual 23-24 V2.0, 2007-07
MLI, V2.0
23.1.4 Parity Generation
For parity generation, the number of transmitted bits with the value of 1 is counted over
the header and the complete data field of a frame. For even parity, the parity bit is set if
the result of a modulo-2 division of the elaborated number is 1. For error-free MLI traffic,
even parity generation and checking is defined.
More details on the parity handling of the MLI module are provided on Page 23-42.
23.1.5 Address Prediction
An address prediction method can be enabled to support communication between MLI
transmitter and MLI receiver without sending address offset information in the frames.
This feature reduces the required bandwidth for MLI communication. Both of the
communication partners, MLI transmitter and receiver are able to detect regular offset
differences of consecutive window accesses to the same window. The address
prediction mechanism working independently for each pipe, different prediction values
can be handled in parallel for the different pipes.
The MLI transmitter can compare the offset of each Transfer Window read or write
access with the offset of the previous access to the same Transfer Window. Between the
accesses to a specific window, other windows can be accessed without disturbing the
prediction. Bigger offset differences than 512 bytes are not supported by the address
prediction.
If the offset differences are identical in at least two accesses to the same Transfer
Window, an address prediction is possible and Optimized Write Frames or Optimized
Read Frames can be sent to the receiving controller for this pipe. If the offset difference
of a next access to this Transfer Window does not match the former ones (predicted
offset), address prediction is not possible. In this case, a Normal Frame for writing or
reading (Write Offset and Data Frame or Discrete Read Frame) is started.
The identical address prediction mechanism is built in the receiver. As a result, the
receiver can elaborate the original offset value in the transmitter when receiving an
optimized frame for any pipe.
More details on the address prediction mechanism of the MLI module are provided on
Page 23-45.

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish