TC1796
System Units (Vol. 1 of 2)
System Timer
User’s Manual 15-4 V2.0, 2007-07
STM, V2.0
15.2.1 Resolution and Ranges
Table 15-1 is an overview on the individual timer registers with their resolutions and
timing ranges. As an example, the values for a 75 and 37.5 MHz STM input clock
frequency are given.
Note: The maximum input clock f
STM
is 75 MHz.
Table 15-1 System Timer Resolutions and Ranges
Register STM
Bits
Resolution
[s]
Range
[s]
Resolution Range f
STM
[MHz]
STM_TIM0 [31:0] f
STM
2
32
/ f
STM
13.3 ns 57.3 s 75
STM_TIM1 [35:4] 16 / f
STM
2
36
/ f
STM
213 ns 916.2 s
STM_TIM2 [39:8] 256 / f
STM
2
40
/ f
STM
3.41 µs 244.3 min
STM_TIM3 [43:12] 4096 / f
STM
2
44
/ f
STM
54.6 µs 65.1 h
STM_TIM4 [47:16] 65536 / f
STM
2
48
/ f
STM
0.874 ms 43.44 days
STM_TIM5 [51:20] 2
20
/ f
STM
2
52
/ f
STM
13.98 ms 1.90 yr
STM_TIM6 [55:32] 2
32
/ f
STM
2
56
/ f
STM
57.3 s 30.47 yr
STM_CAP [55:32] 2
32
/ f
STM
2
56
/ f
STM
57.3 s 30.47 yr
STM_TIM0 [31:0] f
STM
2
32
/ f
STM
26.7 ns 114.5 s 37.5
STM_TIM1 [35:4] 16 / f
STM
2
36
/ f
STM
426 ns 1832.5 s
STM_TIM2 [39:8] 256 / f
STM
2
40
/ f
STM
6.8 µs 488.7 min
STM_TIM3 [43:12] 4096 / f
STM
2
44
/ f
STM
109 µs 130.3 h
STM_TIM4 [47:16] 65536 / f
STM
2
48
/ f
STM
1.75 ms 86.87 days
STM_TIM5 [51:20] 2
20
/ f
STM
2
52
/ f
STM
28.0 ms 3.81 yr
STM_TIM6 [55:32] 2
32
/ f
STM
2
56
/ f
STM
114.5 s 60.93 yr
STM_CAP [55:32] 2
32
/ f
STM
2
56
/ f
STM
114.5 s 60.93 yr