TC1796
Peripheral Units (Vol. 2 of 2)
General Purpose Timer Array (GPTA)
User’s Manual 24-148 V2.0, 2007-07
GPTA, V2.0
24.2.7 Programming of a GPTA Module
A hierarchical top-down design approach may be used to implement a complex signal
processing unit as follows:
• Partitioning the complex signal processing unit into simple function units.
• Implementing each simple function unit by configuring the LTC and/or GTC cells
which can be tied together for realizing a common signal operation.
• Implementing necessary signal pre-processing tasks by configuring the FPC, PDL,
DCM and PLL cells accordingly.
• Defining and configuring all input/output port pins required as clock source, trigger
input or signal output.
Table 24-15 summarizes all of the software tasks to be implemented for getting a GPTA
unit into operation.
Table 24-15 Software Tasks Controlling a GPTA Unit
GPTA Shell Initialization
GPTA Module Clock Enable
Fractional Divider Setting
Module Enable
Configuration of Interrupt Handling
GPTA Kernel Initialization
FPC: PDL:
Selection of Operating Mode (Prescaler,
Filter or Feed-Through)
Selection of Operating Mode (Phase
Discriminator or Feed-Through)
Input Channel Selection 2- or 3-Sensor Mode Selection
Clock Selection PLL:
Configuration of Prescaler Factor or
Debounce Mode
Selection of Input Channel
DCM: Estimation of Input Signal Period Width
Selection of Reset Event for Timer Configuration of Output Signal Frequency
Selection of Trigger Source for Capture
Event
Handling of Input Signal Period Length
Variation
Selection of Trigger Source for Capcom
Register Update
Interrupt Request Enable on End of Output
Pulse Generation
Interrupt Request Enable on Input Edge or
Compare Event
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