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Infineon Technologies TC1796 - 11.7.2 Load and Store

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual 11-41 V2.0, 2007-07
PCP, V2.0
11.7.2 Load and Store
Note: If a conditional instruction’s condition code is false, the operation will be treated as
a “No Operation”. Register values will not be changed and the flags will not be
updated.
Table 11-4 Load and Store Instructions
Load LD.F Load value from FPI Bus address location into register
(FPI Bus address = register content)
LD.I Load immediate value into register
LD.IF Load value from FPI Bus address location into register
(FPI Bus address = register content + immediate offset)
LD.P Load value from PRAM address location into register
(PRAM address = DPTR + register offset)
LD.PI Load value from PRAM address location into register
(PRAM address = DPTR + immediate offset)
LDL.IL Load 16-bit immediate value into lower bits [15:0] of register
LDL.IU Load 16-bit immediate value into upper bits [31:16] of register
Store ST.F Store register value to FPI Bus address location
(FPI Bus address = register content)
ST.IF Store register value to FPI Bus address location
(FPI Bus address = register content + immediate offset)
ST.P Store register value to PRAM address location
(PRAM address = DPTR + register offset)
ST.PI Store register value to PRAM address location
(PRAM address = DPTR + immediate offset)
Move MOV Conditionally move register value to register

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