TC1796
System Units (Vol. 1 of 2)
Introduction
User’s Manual 1-8 V2.0, 2007-07
Intro, V2.0
1.2 System Architecture of the TC1796
The TC1796 combines three powerful technologies within one silicon die, achieving new
levels of power, speed, and economy for embedded applications:
• Reduced Instruction Set Computing (RISC) processor architecture
• Digital Signal Processing (DSP) operations and addressing modes
• On-chip memories and peripherals
DSP operations and addressing modes provide the computational power necessary to
efficiently analyze complex real-world signals. The RISC load/store architecture
provides high computational bandwidth with low system cost. On-chip memory and
peripherals are designed to support even the most demanding high-bandwidth real-time
embedded control-systems tasks.
Additional high-level features of the TC1796 include:
• Program Memory Unit – instruction memory and instruction cache
• Data Memory Unit – data memory
• Serial communication interfaces – flexible synchronous and asynchronous modes
• Peripheral Control Processor – standalone data operations and interrupt servicing
• DMA Controller – DMA operations and interrupt servicing
• General-purpose timers
• High-performance on-chip buses
• On-chip debugging and emulation facilities
• Flexible interconnections to external components
• Flexible power-management
The TC1796 is a high-performance microcontroller with TriCore CPU, program and data
memories, buses, bus arbitration, an interrupt controller, a peripheral control processor
and a DMA controller, several on-chip peripherals, and an external bus interface. The
TC1796 is designed to meet the needs of the most demanding embedded control
systems applications where the competing issues of price/performance, real-time
responsiveness, computational power, data bandwidth, and power consumption are key
design elements.
The TC1796 offers several versatile on-chip peripheral units such as serial controllers,
timer units, and Analog-to-Digital converters. Within the TC1796, all these peripheral
units are connected to the TriCore CPU/system via two Flexible Peripheral Interconnect
(FPI) Buses. Several I/O lines on the TC1796 ports are reserved for these peripheral
units to communicate with the external world.
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