TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-53 V2.0, 2007-07
EBU, V2.0
13.8.3 Standard Asynchronous Access Phases
Accesses to asynchronous devices are composed of a subset of the standard access
phases which are detailed in Section 13.7. The standard access phases for
asynchronous devices are:
• AP: Address Phase (compulsory - see Page 13-41)
• CD: Command Delay Phase (optional - see Page 13-43)
• CP: Command Phase (compulsory - see Page 13-43)
• DH: Data Hold Phase (optional - see Page 13-45)
• RP: Recovery Phase (optional - see Page 13-47)
13.8.4 Programmable Parameters
Table 13-17 lists the programmable parameters for asynchronous accesses. These
parameters only apply to asynchronous devices when EBU_BUSCONx.AGEN = 000
B
.
Note that emulation registers “EBU_EMU…” include parameters that control the
emulator chip select region (CSEMU output), while “EBU_BUS…x” registers include
parameters that control the four CS[3:0] chip select regions x. The equivalent registers
contain identical bits and bit fields.
Table 13-17 Asynchronous Access Programmable Parameters
Register Parameter
(Bit/Bit field)
Function
EBU_BUSAPx
EBU_EMUBAP
ADDRC Number of cycles in address phase; can be
multiplied by CMULT.
CMDDELAY Number of programmed command delay cycles;
can be multiplied by CMULT.
WAITRDC Number of programmed wait states for read
accesses; always multiplied by CMULT.
WAITWRC Number of programmed wait states for write
accesses; always multiplied by CMULT.
DATAC Number of Data Hold cycles; always multiplied by
CMULT.
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