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Infineon Technologies TC1796 - Page 832

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-54 V2.0, 2007-07
EBU, V2.0
EBU_BUSAPx
EBU_EMUBAP
RDRECOVC Number of minimum recovery cycles after a read
access; can be multiplied by CMULT.
WRRECOVC Number of minimum recovery cycles after a write
access; can be multiplied by CMULT.
DTARDWR Number of minimum recovery cycles between a
read access and a write access; always multiplied
by CMULT.
DTACS Number of minimum recovery cycles when the next
access going to a different memory region; always
multiplied by CMULT.
EBU_BUSCONx
EBU_EMUBC
WAIT External Wait State control (OFF, asynchronous,
synchronous)
WAITINV Reversed polarity at WAIT
: active low or active high
CMULT Common (cycle) multiplier control (×1, ×4, ×8, ×16,
×32)
MULTMAP Multiplier map, each bit enables multiplier function of
bits and bit fields ADDRC, CMDDELAY, DATAC,
RDRECOVC, and WRRECOVC.
Table 13-17 Asynchronous Access Programmable Parameters (cont’d)
Register Parameter
(Bit/Bit field)
Function

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