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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
Peripheral Units (Vol. 2 of 2)
Controller Area Network (MultiCAN) Controller
User’s Manual 22-145 V2.0, 2007-07
MultiCAN, V2.0
As a result, the ICE and the RCE describing the reception / transmission of a message
in the last time window of a basic cycle lead to actions (interrupts, etc.) when time mark 1
is reached.
22.6.5 Scheduler Instruction Sequence
22.6.5.1 BCC and CSM
In order to set up the scheduler instructions correctly, the values of CSM and BCC in
register CYCTMR must be respected carefully, especially for the last time window of a
basic cycle.
In order to set up the scheduler instructions correctly, the values of CSM and BCC in
register CYCTMR must be respected carefully, especially for the last time window of a
basic cycle. When leaving the Configuration Mode, BCC and CSM are 0 and the
scheduler starts with time mark 1. The values for BCC and CSM in Figure 22-23
represent the internal values that are updated after the correct transfer of a reference
message.
The message triggered by the last time mark in a basic cycle is the reference mark (see
RME description). In Figure 22-33, this corresponds to the message after the time
window n. The reference time mark follows after the time window n and the reference
message starts a new basic cycle.

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish