TC1796
Peripheral Units (Vol. 2 of 2)
Fast Analog-to-Digital Converter (FADC)
User’s Manual 26-24 V2.0, 2007-07
FADC, V2.0
26.1.9 Interrupt Generation
A flexible service request control structure is implemented in the FADC. The FADC
provides four channel conversion request sources and two filter block request sources,
that can be programmed to generate one of four service request output signals SR[3:0].
The service request compressor also makes it possible to assign more than one service
request source to one service request output.
Figure 26-12 Service Request Configuration
All six service requests are controlled by an identical control logic. This control logic as
shown in Figure 26-13 provides the following functionality:
• Service Request Flag
• Set/Clear Request Flag Control Bits
• Service Request Enable Bit
• Service Request Node Pointer
Figure 26-13 Service Request Control Logic
MCA06049
Service
Request
Compressor
Filter Block 0 calculation finished
Channel 0 conversion finished
SR0
SR1
SR2
SR3
Channel 1 conversion finished
Channel 2 conversion finished
Channel 3 conversion finished
Filter Block 1 calculation finished
Channel
Conversion
Requests
Filter
Block
Requests
MCA06050_mod
Request
Flag
CRSR
Set
Service Request
Trigger Signal
Clear
Enable
Bit
CFGRx /FCRn
Reset Req.
Flag Bit
FMR
Set Req.
Flag Bit
01
10
11
00
Node
Pointer
CFGRx /FCRn
³1
To SR0 OR-Gate
To SR1 OR-Gate
To SR2 OR-Gate
To SR3 OR-Gate
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