TC1796
System Units (Vol. 1 of 2)
Direct Memory Access Controller
User’s Manual 12-42 V2.0, 2007-07
DMA, V2.0
12.2 DMA Module Kernel Registers
Figure 12-29 and Table 12-6 show all registers associated with the DMA Controller
Kernel.
DMA Registers Overview
Figure 12-29 DMA Kernel Registers
The complete and detailed address map of the DMA module is described in Table 18-23
on Page 18-53 of the TC1796 User’s Manual System Units part (Volume 1).
Note: For documentation automation purposes, the DMA channel numbering index “x”
is used in the DMA module kernel register descriptions. This index is represented
by “n” for DMA channel numbering in the functional description. For example, an
index reference “mx” is equivalent to index “mn”. Index “m” (m = 0-1) refers to the
DMA Sub-Blocks and indexes “n” and “x” (n = x = 0-7) refer to the DMA channels.
Table 12-5 Registers Address Space - DMA Kernel Registers
Module Base Address End Address Note
DMA F000 3C00
H
F000 3EFF
H
–
MCA05706_mod
SADRmx
Channel
Control/Status
Registers
General
Control/Status
Registers
Channel Address
Registers
DADRmx
CHSRmx
SHADRmx
System Registers
CHCRmx
CHICRmx
CHRSTR
TRSR
STREQ
HTREQ
EER
ERRSR
CLRE
MESR
ADRCRmx
MEmR
INTSR
INTCR
WRPSR
Move Engine
Registers
MEmPR
OCDSR
SUSPMR
MEmAENRGINTR
MEmARR
m = 1,0 x = 7- 0
ID
To Next Page
Loading...
Need help?
General