TC1796
System Units (Vol. 1 of 2)
Peripheral Control Processor (PCP)
User’s Manual 11-105 V2.0, 2007-07
PCP, V2.0
11.11.37 XCH, Exchange
This section describes the XCH instructions of the PCP.
XCH.F Syntax XCH.F Rb, [Ra], Size
Description Exchange contents of R[b] and FPI[R[a]] When Size is byte or
half-word, the value is stored with the internal LSB (bit 0)
properly aligned to the correct FPI byte or half-word lane. The
exchange is done via a locked FPI bus transfer.
Operation temp = R[b]
R[b] = zero_ext(FPI[R[a]])
FPI[R[a]] = temp
Flags N, Z
XCH.PI Syntax XCH.PI Ra, [#offset6]
Description Exchange contents of R[a] and PRAM[DPTR <<6 + #offset6].
Note: The exchange is un-interruptible, and locks out
external accesses; it will not be interrupted by any
external FPI bus master transfer requests.
Operation temp = R[a]
R[a] = PRAM[(DPTR<<6) + zero_ext(#offset6)]
PRAM[(DPTR<<6) + zero_ext(#offset6)] = temp
Flags N, Z
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