Infineon Technologies TC1796 - 7.2.11.4 Flash Configuration Register

TC1796
System Units (Vol. 1 of 2)
Program Memory Unit
User’s Manual 7-53 V2.0, 2007-07
PMU, V2.0
7.2.11.4 Flash Configuration Register
The Flash Configuration Register FCON controls general Flash configuration functions:
• Number of internal wait states for Flash accesses (without or with word-line hit)
• Indication of installed and active read protection
• Instruction and data access control for read protection
• Interrupt enable/mask bits
• Power reduction and shut-down control
FCON is an Endinit-protected register. The reset value of register FCON as indicated
below shows the value after ramp-up and after execution of the startup procedure out of
Boot ROM.
FLASH_FCON
Flash Configuration Register (1014
H
) Reset Value: 000X 0636
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
EOB
M
DF
DB
ERM
PF
DB
ERM
DF
SB
ERM
PF
SB
ERM
PRO
ERM
SQ
ERM
0
DDF
PCP
DDF
DMA
DDF
DBG
DDF DCF RPA
rw rw rw rw rw rw rw r rw rw rw rwh rwh rh
1514131211109876543210
SL
EEP
ESL
DIS
0
WS
EC
DF
WS
DFLASH
0
WS
WLHIT
WS
EC
PF
WS
PFLASH
rw rw r rw rw r rw rw rw
Field Bits Type Description
WSPFLASH
1)
[2:0] rw Wait States for PFLASH Read Access
This bit field determines the number of internal wait
states that are used for an initial PFLASH read
access.
000
B
1 clock cycle wait state selected
001
B
1 clock cycle wait state selected
010
B
2 clock cycles wait state selected
011
B
3 clock cycles wait state selected
100
B
4 clock cycles wait state selected
101
B
5 clock cycles wait state selected
110
B
6 clock cycles wait state selected
(default after reset)
111
B
7 clock cycles wait state selected