TC1796
System Units (Vol. 1 of 2)
General Purpose I/O Ports and Peripheral I/O Lines
User’s Manual 10-26 V2.0, 2007-07
Ports, V2.0
10.4 Port 1
This section describes the Port 1 functionality in detail.
10.4.1 Port 1 Configuration
Port 1 is a 16-bit bi-directional general-purpose I/O port that can be alternatively used for
the MLI0 I/O lines or for the external trigger inputs REQ[3:0] of the CPU. Furthermore,
the system clock output SYSCLK is provided at Port 1.
Figure 10-5 Port 1 Configuration Diagram
MCA05656
P1.8 / RCLK0AP6.8
P1.9 Control
P1.10 Control
P1.11 Control
P1.12 Control
P1.13 Control
P1.14 Control
P1.15 Control
P1.9 / RREADY0A
P1.10 / RVALID0A
P1.11 / RDATA0A
P1.12 / SYSCLK
P1.13 / RCLK0B
P1.14 / RVALID0B
P1.15 / RDATA0B
P1.7 / TDATA0
P1.7 Control
P1.6 / TVALID0A
P1.6 Control
P1.5 / TREADY0A
P1.5 Control
P1.4 Control
P1.8 Control
A1
A1
A1
A1
A1
A1
A1
P1.3 Control
A1
P1.2 Control
A1
P1.1 Control
A1
P1.0 Control
A1
P1.0 / REQ0
P1.1 / REQ1
P1.2 / REQ2
P1.3 / REQ3 / TREADY0B
SCU
MLI0
A2
P1.4 / TCLK0
A2
A2
A2
A2
CAN
TTCAN
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