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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-55 V2.0, 2007-07
EBU, V2.0
13.8.5 Accesses to Demultiplexed Devices
Figure 13-18 Demultiplexed External Bus Read Access Cycle
Figure 13-18 above shows an example of a read access to a demultiplexed device. This
type of access cycle consists of two to four phases as follows:
Address Phase (compulsory)
Command Delay Phase (optional)
Command Phase (compulsory)
Recovery Phase (optional)
The example shows an access cycle with all four phases programmed for a duration of
one LMBCLK cycle.
Address
LMBCLK
1)
A[23:0]
MCT05729
Sample
ADV
AP
(1 to n)
CD
2)
(0 to n)
CP
(1 to n)
RP
2)
(0 to n)
next AP
Next A.
CSx
RD
RD/WR
MR/W
Data in
D[31:0]
BCx
3) 3)
1) All phases programmed to one LMBCLK period length.
2) These phases are optional and can be skipped.
3) BCx signals can be asserted either with CSx or RD.
Notes:

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish