Infineon Technologies TC1796 - 10.2.5 Emergency Stop Register

TC1796
System Units (Vol. 1 of 2)
General Purpose I/O Ports and Peripheral I/O Lines
User’s Manual 10-16 V2.0, 2007-07
Ports, V2.0
10.2.5 Emergency Stop Register
All GPIO lines which are used by the GPTA modules (GPTA0, GPTA1, LTCA2) have an
emergency stop logic implemented (see Figure 10-2). These GPTA related GPIO lines
are:
• P2.[15:8], P3.[15:0], P4.[15:0], P8.[7:0], and P9.[7:0]
Each of these GPIO lines has its own emergency stop enable bit ENx that is located in
the emergency stop register Pn_ESR of Port n. If the emergency stop signal becomes
active, one of two states can be selected:
• Emergency stop function disabled (ENx = 0):
A GPTA output line remains connected to the GPTA module (alternate function).
• Emergency stop function enabled (ENx = 1):
A GPTA output line is disconnected from the GPTA module (alternate function) and
connected to the corresponding bit of the Pn_OUT output register (the content of the
corresponding PCx bit fields in register Pn_IOCR is discarded).
Pn_ESR
Port n Emergency Stop Register (50
H
) Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
r
1514131211109876543210
EN
15
EN
14
EN
13
EN
12
EN
11
EN
10
EN
9
EN
8
EN
7
EN
6
EN
5
EN
4
EN
3
EN
2
EN
1
EN
0
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Field Bits Type Description
ENx
(x = 0-15)
xrwEmergency Stop Enable for Port n Pin x
This bit enables the emergency stop function for
GPIO lines used as GPTA outputs. If the emergency
stop condition is met and enabled, the output
selection is automatically switched from alternate
(GPTA output) function to GPIO output function.
0
B
Emergency stop function for Pn.x is disabled.
1
B
Emergency stop function for Pn.x is enabled.
0 [31:16] r Reserved
Read as 0; should be written with 0.