Infineon Technologies TC1796 - 13.10.5 Address Select Register, ADDRSELx

TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-90 V2.0, 2007-07
EBU, V2.0
13.10.5 Address Select Register, ADDRSELx
EBU_ADDRSELx (x = 0-3)
EBU Address Select Register x (080
H
+x*8
H
)
ADDRSEL[3:1] - Reset Value: 0000 0000
H
ADDRSEL0 - Reset Value (internal boot): 0000 0000
H
ADDRSEL0 - Reset Value (external boot): A000 0001
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
BASE
rw
1514131211109876543210
BASE ALTSEG MASK 0
ALT
EN
AB
REG
EN
AB
rw rw rw r rw rw
Field Bits Type Description
REGENAB 0rwMemory Region Enable
0
B
Memory region is disabled (default after reset
except for ADDRSEL0 - see below).
1
B
Memory region is enabled.
When the EBU is in external boot mode, REGENAB
in register ADDRSEL0 is 1 after reset.
ALTENAB 1rwAlternate Segment Comparison Enable
0
B
ALTSEG is never compared to LMB address
(default after reset).
1
B
ALTSEG is always compared to LMB address.
MASK [7:4] rw Memory Region Address Mask
Specifies the number of right-most bits in the base
address starting at bit 26, which should be included in
the address comparison. Bits [31:27] will always be
part of the comparison.
ALTSEG [11:8] rw Memory Region Alternate Segment
Alternate segment to be compared to PLMB address
bit [31:28].