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Infineon Technologies TC1796 - Page 869

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-91 V2.0, 2007-07
EBU, V2.0
Note: The actual reset value of the ADDRSEL0 register is not relevant during external
boot modes, as the EBU_CON.CS0FAM bit is set to ensure that region 0 (i.e. CS0)
is activated for all external bus accesses. This allows external boot to be
performed from region 0 regardless of the actual boot address of the CPU to which
EBU is connected.
BASE [31:12] rw Memory Region Base Address
Base address to be compared to PLMB address in
conjunction with the mask control.
0 [3:2] r Reserved
Read as 0; should be written with 0.
Field Bits Type Description

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