Infineon Technologies TC1796 - 18.2 Registers Tables

TC1796
System Units (Vol. 1 of 2)
Register Overview
User’s Manual 18-7 V2.0, 2007-07
Regs, V2.0
18.2 Registers Tables
Table 18-3 up to Table 18-42 show the address maps with all register of segment 15.
Note: Addresses listed in columns “Address” are always word (32-bit) addresses.
Table 18-3 Address Map of SCU and WDT
Short Name Description Address Access Mode Reset Value
Read Write
System Control Unit (SCU) with Watchdog Timer (WDT)
– Reserved F000 0000
H
-
F000 0004
H
BE BE –
SCU_ID SCU Module Identification
Register
F000 0008
H
U, SV BE 002C C0XX
H
SCU_
SCLKFDR
SCU System Clock
Fractional Divider
Register
F000 000C
H
U, SV SV, E 0000 0000
H
RST_REQ Reset Request Register F000 0010
H
U, SV U,
SV, E
0000 0000
H
RST_SR Reset Status Register F000 0014
H
U, SV BE see
Page 4-4
OSC_CON Oscillator Control
Register
F000 0018
H
U, SV SV, E see
Page 3-9
– Reserved F000 001C
H
BE BE –
WDT_CON0 Watchdog Timer Control
Register 0
F000 0020
H
U, SV U,
SV,
PW
FFFC 0002
H
WDT_CON1 Watchdog Timer Control
Register 1
F000 0024
H
U, SV U,
SV, E
0000 0000
H
WDT_SR Watchdog Timer Status
Register
F000 0028
H
U, SV U,
SV,
NC
FFFC 0010
H
NMISR NMI Status Register F000 002C
H
U, SV U, SV 0000 0000
H
– Reserved F000 0030
H
BE BE –
PMG_CSR Power Management
Control and Status
Register
F000 0034
H
U, SV U, SV 0000 0100
H