TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-28 V2.0, 2007-07
Buses, V2.0
6.5.4 BCU Debug Support
For debugging purposes, the BCU has the capability for breakpoint generation support.
This OCDS debug capability is controlled by the Cerberus module and must be enabled
by it (indicated by bit xBCU_DBCNTL.EO).
When BCU debug support has been enabled (EO = 1), any breakpoint request
generated by the BCU to the Cerberus disarms the BCU breakpoint logic for further
breakpoint requests. In order to rearm the BCU breakpoint logic again for the next
breakpoint request generation, bit xBCU_DBCNTL.RA must be set. The status of the
BCU breakpoint logic (armed or disarmed) is indicated by bit xBCU_DBCNTL.OA.
There are three types of trigger events:
• Address triggers
• Signal triggers
• Grant triggers
6.5.4.1 Address Triggers
The address debug trigger event conditions are defined by the contents of the
xBCU_DBADR1, xBCU_DBADR2, and xBCU_DBCNTL registers. A wide range of
possibilities arise for the creation of debug trigger events based on addresses. The
following debug trigger events can be selected:
• Match on one signal address
• Match on one of two signal addresses
• Match on one address area
• Mismatch on one address area
Each pair of DBADRx registers and DBCNTL.ONAx bits determine one possible debug
trigger event. The combination of these two possible debug trigger events defined by
DBCNTL.CONCOM1 determine the address debug trigger event condition.
Figure 6-9 Address Trigger Generation
MCA05636
ONA2
xBCU_DBADR1
Compare Logic 1
(equal,
greater equal)
xBCU_DBCNTL
2
ONA1
xBCU_DBADR2
Compare Logic 2
(equal, less equal)
FPI Bus
Address
Address 1
Trigger
Address 2
Trigger
Control
Control
ADR1 ADR2
x = “S“ for SBCU
x = “R“ for RBCU
2
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