EasyManuals Logo

Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
2150 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1963 background imageLoading...
Page #1963 background image
TC1796
Peripheral Units (Vol. 2 of 2)
Analog-to-Digital Converter (ADC)
User’s Manual 25-32 V2.0, 2007-07
ADC, V2.0
Individual Clear of Pending Conversion Requests
If several conversion requests are pending for the same analog channel, this channel will
be converted several times until all pending conversion requests are performed. This is
the default setting after reset (CON.CPR = 0).
25.1.3.5 Arbitration and Synchronized Injection
The master of a Synchronized Injection provides no separated source for this feature.
The behavior of a Synchronized Injection is specified by the original requesting source.
In the slave A/D Converter, a request for a Synchronized Injection always has the
highest priority. A request for a synchronized request in a slave module does not
participate in the arbitration cycle. This synchronized request is immediately set as the
arbitration winner. This request remains until it is served or it is cancelled by the master.
25.1.3.6 Arbitration Lock
If the timer runs in Arbitration Lock Mode and the current timer value TSTAT.TIMER is
equal to or below the arbitration lock boundary, the arbitration lock bit STAT.AL is set.
Setting the arbitration lock bit also sets the timer participation flag. In this way, the timer
source can participate in the arbitration cycle without any pending request. Such an
arbitration participation by the timer without a pending request denies all currently
pending sources that have a source-arbitration-level below the timer source as
arbitration winner. All sources with a source-arbitration-level greater than the timer
source retain their possibility to win the arbitration. If the timer wins the arbitration without
a pending request, no conversion will be started for this arbitration winner. This case can
occur if bit AP.TP is set while no bit is set in register TCRP. This feature can be used to
guarantee that no conversions can be started for lower prioritized sources.
Note: The timer participation flag is also set by any pending timer conversion request in
register TCRP.
4. If any source has the same source-arbitration-level as the timer source, the result of
the arbitration cycle depends on the position of this source compared to the timer
source. If this source is checked before the timer source, this can be the arbitration
winner. If this source is checked after the timer source, this source cannot be the
arbitration winner.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Infineon Technologies TC1796 and is the answer not in the manual?

Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish