TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-75 V2.0, 2007-07
EBU, V2.0
Figure 13-29 shows a burst read access (burst length of four) with a BFCLKO frequency
of 1/3 of LMBCLK frequency (EXTCLOCK = 01
B
).
Figure 13-29 Burst Flash Read Operation Example (Burst Length of 4)
The lengths of the standard accesses phases during Burst Flash accesses are
programmed as multiples of LMBCLK periods independent of the BFCLKO frequency. It
is the users responsibility to ensure (by programming the access phases accordingly)
that the sampling of data by the EBU guarantees valid sampling of the data from the
Burst Flash device.
13.9.11 External Cycle Control via the WAIT Input
The EBU controls the Burst Flash device via the WAIT input. This allows the EBU to
support operation of Burst Flash while crossing Burst Flash page boundaries. During a
Burst Flash access, the WAIT input operates in one of the five modes shown in
Table 13-20.
AP
1
AP
2
AP
3
CP
i1
CP
i2
BP
1
BP
2
new
AP1
BP
1
BP
2
CD
i1
CD
i2
CD
i3
BP
1
BP
2
BP
1
BP
2
RP
1
RP
2
LMBCLK
A[23:0]
Addr
MCT05739a
CSx
RD
Data in
Addr. + 0
BFCLKO
ADV
Data in
Addr. + 4
Data in
Addr. + 8
Data in
Addr. + 12
D[31:0]
(32-bit)
Data in
Addr. + 0
Data in
Addr. + 2
Data in
Addr. + 4
Data in
Addr. + 8
BAA
D[15:0]
(16-bit)
Next data
issued by Flash
Data latched in EBU
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