Infineon Technologies TC1796 User Manual

TC1796
System Units (Vol. 1 of 2)
LMB External Bus Unit
User’s Manual 13-35 V2.0, 2007-07
EBU, V2.0
13.5.4 Access Parameter Selection
Selection of the appropriate access parameters is shown in Figure 13-12:
Figure 13-12 Access Parameter Selection Phases
At the end of the PLMB address phase (Cycle n), the 32-bit PLMB address is made
available to the region comparison logic.
In the second phase (Cycle n + 1), the region comparison logic determines whether the
PLMB address lies within an active region (or regions). If the address is not matched (i.e.
is not within an active region), the “No Match” signal causes bits [31:28] or
ALTSEG[11:8] to return an PLMB Error Acknowledge and discard the access. Otherwise
the “Region” signal passes the region index number (in the case of multiple region
matches this is the index number of the lowest matching region) to the parameter
selection logic.
During the third phase (Cycle n + 2), the parameter selection logic selects the
appropriate access cycle parameters. At the end of this cycle, the access parameters
associated with the highest priority region are checked for an invalid access (e.g. a write
access that does not lie within a defined, writable region). If the access is invalid, the
EBU returns an PLMB Error Acknowledge and discards the access. Otherwise the
parameters are made available to the external bus driver logic.
Latched
PLMB
Address
MCA05723
No Match
Region
Arbi-
tration
Region 0
Addr. Compare
Region 1
Addr. Compare
Region 2
Addr. Compare
Region 3
Addr. Compare
Emulator Region
Addr. Compare
Region
Matched
Region 0
Parameters
Region 1
Parameters
Region 2
Parameters
Region 3
Parameters
Emul. Region
Parameters
3
Selection
Access
Parameter
Check
Error
Cycle n
PLMB-to-EBU
Access
Cycle n+1
Comparison
Cycle n+2
Selection
Cycle n+3
Ext. Access
Requested

Infineon Technologies TC1796 Specifications

General

Brand	Infineon Technologies
Model	TC1796
Category	Controller
Language	English