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Infineon Technologies TC1796 User Manual

Infineon Technologies TC1796
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TC1796
System Units (Vol. 1 of 2)
Program Memory Unit
User’s Manual 7-9 V2.0, 2007-07
PMU, V2.0
7.2.3 User Configuration Blocks Overview
The contents of the three User Configuration Blocks (UCBm, m = 0-2) determine user-
specific Flash configuration and protection functions such as keywords and sector-
specific lock bits for the PFLASH. Each 1 Kbyte configuration block contains four UCB
pages.
The UCBs are implemented as a Flash memory. The addressing of the UCBs overlays
the cached addresses of the first 3 Kbyte of the PFLASH. The UCBs are not readable by
the user. A user program can indirectly modify the contents of one UCB page only by two
commands, the Write User Configuration Page and the Erase User Configuration Block
command.
Figure 7-5 UCB Flash Structure
More details on UCBs are described on Page 7-27.
DS1 DP512 128 byte 8FE1 0000
H
- 8FE1 007F
H
AFE1 0000
H
- AFE1 007F
H
DPn
1)
128 byte 8FE1 0000
H
+ OFF -
8FE1 0000
H
+ OFF + 7F
H
(with OFF = n × 80
H
)
AFE1 0000
H
+ OFF -
AFE1 0000
H
+ OFF + 7F
H
(with OFF = n × 80
H
)
DP1023 128 byte 8FE1 FF80
H
- 8FE1 FFFF
H
AFE1 FF80
H
- AFE1 FFFF
H
1) n = 0-1023
Table 7-2 DFLASH Bank and Page Definitions (cont’d)
Numbering Size Cached
Address Range
Non-Cached
Address Range
MCA05645
UCB Page UCP0
256 byte
User Config.
Block UCB0
(1 Kbyte)
UCB Page UCP1
256 byte
UCB Page UCP2
256 byte
UCB Page UCP3
256 byte
UCB Page UCP4
256 byte
User Config.
Block UCB1
(1 Kbyte)
UCB Page UCP5
256 byte
UCB Page UCP6
256 byte
UCB Page UCP7
256 byte
User Config.
Block UCB2
(1 Kbyte)
UCB Page UCP8
256 byte
UCB Page UCP9
256 byte
UCB Page UCP10
256 byte
UCB Page UCP11
256 byte

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Infineon Technologies TC1796 Specifications

General IconGeneral
BrandInfineon Technologies
ModelTC1796
CategoryController
LanguageEnglish